imsm: detect option-rom capabilities
The option-rom advertises its capabilities in a data structure located in the platform ROM region 0xc0000-0xf0000. Attempt to detect the option-rom and limit array creation to the platform's capabilities. Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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Dan Williams
parent
39795f9cda
commit
b390f61061
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/*
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* Intel(R) Matrix Storage Manager hardware and firmware support routines
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*
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* Copyright (C) 2008 Intel Corporation
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#include "mdadm.h"
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#include "platform-intel.h"
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#include "probe_roms.h"
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <unistd.h>
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#include <dirent.h>
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#include <fcntl.h>
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#include <sys/mman.h>
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#include <sys/types.h>
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#include <sys/stat.h>
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void free_sys_dev(struct sys_dev **list)
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{
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while (*list) {
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struct sys_dev *next = (*list)->next;
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if ((*list)->path)
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free((*list)->path);
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free(*list);
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*list = next;
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}
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}
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struct sys_dev *find_driver_devices(const char *bus, const char *driver)
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{
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/* search sysfs for devices driven by 'driver' */
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char path[256];
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char link[256];
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char *c;
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DIR *driver_dir;
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struct dirent *de;
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struct sys_dev *head = NULL;
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struct sys_dev *list = NULL;
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sprintf(path, "/sys/bus/%s/drivers/%s", bus, driver);
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driver_dir = opendir(path);
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if (!driver_dir)
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return NULL;
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for (de = readdir(driver_dir); de; de = readdir(driver_dir)) {
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/* is 'de' a device? check that the 'subsystem' link exists and
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* that its target matches 'bus'
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*/
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sprintf(path, "/sys/bus/%s/drivers/%s/%s/subsystem",
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bus, driver, de->d_name);
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if (readlink(path, link, sizeof(link)) < 0)
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continue;
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c = strrchr(link, '/');
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if (!c)
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continue;
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if (strncmp(bus, c+1, strlen(bus)) != 0)
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continue;
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/* start / add list entry */
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if (!head) {
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head = malloc(sizeof(*head));
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list = head;
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} else {
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list->next = malloc(sizeof(*head));
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list = list->next;
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}
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if (!list) {
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free_sys_dev(&head);
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break;
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}
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/* generate canonical path name for the device */
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sprintf(path, "/sys/bus/%s/drivers/%s/%s",
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bus, driver, de->d_name);
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list->path = canonicalize_file_name(path);
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list->next = NULL;
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}
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return head;
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}
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__u16 devpath_to_vendor(const char *dev_path)
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{
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char path[strlen(dev_path) + strlen("/vendor") + 1];
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char vendor[7];
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int fd;
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__u16 id = 0xffff;
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int n;
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sprintf(path, "%s/vendor", dev_path);
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fd = open(path, O_RDONLY);
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if (fd < 0)
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return 0xffff;
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n = read(fd, vendor, sizeof(vendor));
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if (n == sizeof(vendor)) {
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vendor[n - 1] = '\0';
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id = strtoul(vendor, NULL, 16);
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}
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close(fd);
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return id;
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}
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static int platform_has_intel_ahci(void)
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{
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struct sys_dev *devices = find_driver_devices("pci", "ahci");
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struct sys_dev *dev;
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int ret = 0;
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for (dev = devices; dev; dev = dev->next)
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if (devpath_to_vendor(dev->path) == 0x8086) {
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ret = 1;
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break;
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}
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free_sys_dev(&devices);
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return ret;
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}
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static struct imsm_orom imsm_orom;
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static int scan(const void *start, const void *end)
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{
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int offset;
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const struct imsm_orom *imsm_mem;
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int len = (end - start);
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for (offset = 0; offset < len; offset += 4) {
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imsm_mem = start + offset;
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if (memcmp(imsm_mem->signature, "$VER", 4) == 0) {
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imsm_orom = *imsm_mem;
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return 1;
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}
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}
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return 0;
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}
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const struct imsm_orom *find_imsm_orom(void)
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{
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static int populated = 0;
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/* it's static data so we only need to read it once */
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if (populated)
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return &imsm_orom;
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if (!platform_has_intel_ahci())
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return NULL;
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/* scan option-rom memory looking for an imsm signature */
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if (probe_roms_init() != 0)
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return NULL;
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probe_roms();
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populated = scan_adapter_roms(scan);
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probe_roms_exit();
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if (populated)
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return &imsm_orom;
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return NULL;
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}
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@ -0,0 +1,89 @@
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/*
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* Intel(R) Matrix Storage Manager hardware and firmware support routines
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*
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* Copyright (C) 2008 Intel Corporation
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#include <asm/types.h>
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/* The IMSM OROM Version Table definition */
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struct imsm_orom {
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__u8 signature[4];
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__u8 table_ver_major; /* Currently 2 (can change with future revs) */
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__u8 table_ver_minor; /* Currently 2 (can change with future revs) */
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__u16 major_ver; /* Example: 8 as in 8.6.0.1020 */
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__u16 minor_ver; /* Example: 6 as in 8.6.0.1020 */
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__u16 hotfix_ver; /* Example: 0 as in 8.6.0.1020 */
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__u16 build; /* Example: 1020 as in 8.6.0.1020 */
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__u8 len; /* number of bytes in this entire table */
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__u8 checksum; /* checksum of all the bytes in this table */
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__u16 rlc; /* RAID Level Capability */
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/* we assume the cpu is x86 as the orom should not be found
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* anywhere else
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*/
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#define IMSM_OROM_RLC_RAID0 (1 << 0)
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#define IMSM_OROM_RLC_RAID1 (1 << 1)
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#define IMSM_OROM_RLC_RAID10 (1 << 2)
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#define IMSM_OROM_RLC_RAID1E (1 << 3)
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#define IMSM_OROM_RLC_RAID5 (1 << 4)
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#define IMSM_OROM_RLC_RAID_CNG (1 << 5)
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__u16 sss; /* Strip Size Supported */
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#define IMSM_OROM_SSS_2kB (1 << 0)
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#define IMSM_OROM_SSS_4kB (1 << 1)
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#define IMSM_OROM_SSS_8kB (1 << 2)
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#define IMSM_OROM_SSS_16kB (1 << 3)
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#define IMSM_OROM_SSS_32kB (1 << 4)
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#define IMSM_OROM_SSS_64kB (1 << 5)
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#define IMSM_OROM_SSS_128kB (1 << 6)
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#define IMSM_OROM_SSS_256kB (1 << 7)
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#define IMSM_OROM_SSS_512kB (1 << 8)
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#define IMSM_OROM_SSS_1MB (1 << 9)
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#define IMSM_OROM_SSS_2MB (1 << 10)
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#define IMSM_OROM_SSS_4MB (1 << 11)
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#define IMSM_OROM_SSS_8MB (1 << 12)
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#define IMSM_OROM_SSS_16MB (1 << 13)
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#define IMSM_OROM_SSS_32MB (1 << 14)
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#define IMSM_OROM_SSS_64MB (1 << 15)
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__u16 dpa; /* Disks Per Array supported */
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__u16 tds; /* Total Disks Supported */
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__u8 vpa; /* # Volumes Per Array supported */
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__u8 vphba; /* # Volumes Per Host Bus Adapter supported */
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/* Attributes supported. This should map to the
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* attributes in the MPB. Also, lower 16 bits
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* should match/duplicate RLC bits above.
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*/
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__u32 attr;
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#define IMSM_OROM_ATTR_RAID0 IMSM_OROM_RLC_RAID0
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#define IMSM_OROM_ATTR_RAID1 IMSM_OROM_RLC_RAID1
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#define IMSM_OROM_ATTR_RAID10 IMSM_OROM_RLC_RAID10
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#define IMSM_OROM_ATTR_RAID1E IMSM_OROM_RLC_RAID1E
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#define IMSM_OROM_ATTR_RAID5 IMSM_OROM_RLC_RAID5
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#define IMSM_OROM_ATTR_RAID_CNG IMSM_OROM_RLC_RAID_CNG
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#define IMSM_OROM_ATTR_2TB (1 << 29)
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#define IMSM_OROM_ATTR_PM (1 << 30)
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#define IMSM_OROM_ATTR_ChecksumVerify (1 << 31)
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__u32 reserved1;
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__u32 reserved2;
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} __attribute__((packed));
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struct sys_dev {
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char *path;
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struct sys_dev *next;
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};
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struct sys_dev *find_driver_devices(const char *bus, const char *driver);
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__u16 devpath_to_vendor(const char *dev_path);
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void free_sys_dev(struct sys_dev **list);
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const struct imsm_orom *find_imsm_orom(void);
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